Applications like Apache and MySQL already run on x86 chips and can be ported to run on Tilera chips, company executives said. In a co-processor environment, x86 processors will run legacy applications, while the Tilera will do the Web-specific applications, he said.

"As a smaller company, we can focus in on a couple of applications, drive those, and over time as we grow, we can expand," said Bob Doud, director of marketing at Tilera. The company didn't talk about the markets it would like to go into in the future.

However, industry analysts say that application performance either levels off or even deteriorates as more cores are added to chips. Part of the performance relies on how the cores are assembled, said Agarwal, who is also a professor of electrical engineering and computer science at the Massachusetts Institute of Technology.

For faster data exchange, Tilera has organized parallelized cores in a square with multiple points to receive and transfer data. Each core has a switch for faster data exchange. Chips from Intel and AMD rely on crossbars, but as the number of cores expands, the design could potentially cause a gridlock that could lead to bandwidth issues, he said.

"You can have three or four streets coming in but ... it's hard to imagine 30 streets coming into an intersection," Agarwal said. The mesh architecture used in Tilera chips is expandable as the square gets bigger, he said.